@article {989,
	title = {Fine-grained Bit-Flip Protection for Relaxation Methods},
	journal = {Journal of Computational Science},
	year = {2016},
	month = {2016-11},
	abstract = {Resilience is considered a challenging under-addressed issue that the high performance computing community (HPC) will have to face in order to produce reliable Exascale systems by the beginning of the next decade. As part of a push toward a resilient HPC ecosystem, in this paper we propose an error-resilient iterative solver for sparse linear systems based on stationary component-wise relaxation methods. Starting from a plain implementation of the Jacobi iteration, our approach introduces a low-cost component-wise technique that detects bit-flips, rejecting some component updates, and turning the initial synchronized solver into an asynchronous iteration. Our experimental study with sparse incomplete factorizations from a collection of real-world applications, and a practical GPU implementation, exposes the convergence delay incurred by the fault-tolerant implementation and its practical performance.},
	keywords = {Bit flips, Fault tolerance, High Performance Computing, iterative solvers, Jacobi method, sparse linear systems},
	doi = {https://doi.org/10.1016/j.jocs.2016.11.013},
	author = {Hartwig Anzt and Jack Dongarra and Enrique S. Quintana-Orti}
}
@article {825,
	title = {Improving the Energy Efficiency of Sparse Linear System Solvers on Multicore and Manycore Systems},
	journal = {Philosophical Transactions of the Royal Society A -- Mathematical, Physical and Engineering Sciences},
	volume = {372},
	year = {2014},
	month = {2014-07},
	abstract = {While most recent breakthroughs in scientific research rely on complex simulations carried out in large-scale supercomputers, the power draft and energy spent for this purpose is increasingly becoming a limiting factor to this trend. In this paper, we provide an overview of the current status in energy-efficient scientific computing by reviewing different technologies used to monitor power draft as well as power- and energy-saving mechanisms available in commodity hardware. For the particular domain of sparse linear algebra, we analyze the energy efficiency of a broad collection of hardware architectures and investigate how algorithmic and implementation modifications can improve the energy performance of sparse linear system solvers, without negatively impacting their performance.},
	keywords = {energy efficiency, graphics processing units, High Performance Computing, iterative solvers, multicore processors, sparse linear systems},
	doi = {10.1098/rsta.2013.0279},
	author = {Hartwig Anzt and Enrique S. Quintana-Orti}
}
