Publications

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Submitted
Haidar, A., H. Jagode, P. Vaccaro, S. Tomov, and J. Dongarra, “Investigating Power Capping toward Energy-Efficient Scientific Applications,” Concurrency and Computation: Practice and Experience (CCPE): Special Issue on Power-Aware Computing 2017, Submitted.
2019
Beck, M., T. Moore, and P. Luszczek, “Interoperable Convergence of Storage, Networking, and Computation,” Future of Information and Communication Conference (FICC), San Francisco, Science and Information (SAI), March 2019.  (1.8 MB)
2018
Jagode, H., A. Danalis, and J. Dongarra, “Accelerating NWChem Coupled Cluster through dataflow-based Execution,” The International Journal of High Performance Computing Applications, vol. 32, issue 4, pp. 540--551, July 2018.  (1.68 MB)
Wu, W., G. Bosilca, X. Luo, T. Patinyasakdikul, L. Wang, and J. Dongarra, “ADAPT: An Event-Based Adaptive Collective Communication Framework,” Proceedings of the 27th International Symposium on High-Performance Parallel and Distributed Computing - HPDC '18, Tempe, Arizona, ACM Press, June 2018.  (493.65 KB)
Yamazaki, I., A. Abdelfattah, A. Ida, S. Ohshima, S. Tomov, R. Yokota, and J. Dongarra, “Analyzing Performance of BiCGStab with Hierarchical Matrix on GPU clusters,” IEEE International Parallel and Distributed Processing Symposium (IPDPS), Vancouver, British Columbia, Canada, IEEE, May 2018.  (1.37 MB)
Abdelfattah, A., A. Haidar, S. Tomov, and J. Dongarra, “Batched One-Sided Factorizations of Tiny Matrices Using GPUs: Challenges and Countermeasures,” Journal of Computational Science, vol. 26, pp. 226–236, May 2018.  (3.73 MB)
Marques, O., J. Demmel, and P. B. Vasconcelos, “Bidiagonal SVD Computation via an Associated Tridiagonal Eigenproblem,” LAPACK Working Note, no. LAWN 295, ICL-UT-18-02: University of Tennessee, April 2018.  (1.53 MB)
Asch, M., T. Moore, R. M. Badia, M. Beck, P. Beckman, T. Bidot, F. Bodin, F. Cappello, A. Choudhary, B. R. de Supinski, et al., “Big Data and Extreme-Scale Computing: Pathways to Convergence - Toward a Shaping Strategy for a Future Software and Data Ecosystem for Scientific Inquiry,” The International Journal of High Performance Computing Applications, vol. 32, issue 4, pp. 435–479, July 2018.  (1.29 MB)
Caniou, Y., E. Caron, A. Kong Win Chang, and Y. Robert, “Budget-aware scheduling algorithms for scientific workflows with stochastic task weights on heterogeneous IaaS cloud platforms,” 27th International Heterogeneity in Computing Workshop {HCW 2013}: IEEE Computer Society Press, 2018.  (1.31 MB)
Han, L., L-C. Canon, H. Casanova, Y. Robert, and F. Vivien, “Checkpointing Workflows for Fail-Stop Errors,” IEEE Transactions on Computers, vol. PP, issue 99, 2018.
Casanova, H., J. Herrmann, and Y. Robert, “Computing the expected makespan of task graphs in the presence of silent errors,” Parallel Computing, vol. 75, 2018.  (2.56 MB)
Benoit, A., A. Cavelan, F. Cappello, P. Raghavan, Y. Robert, and H. Sun, “Coping with silent and fail-stop errors at scale by combining replication and checkpointing,” J. Parallel and Distributed Computing, vol. to appear, 2018.  (837 KB)
Aupy, G., A. Benoit, S. Dai, L. Pottier, P. Raghavan, Y. Robert, and M. Shantharam, “Co-scheduling Amdhal applications on cache-partitioned systems,” Int. Journal of High Performance Computing Applications, vol. 32, no. 1, pp. 123-138, 2018.  (672.52 KB)
Aupy, G., A. Benoit, B. Goglin, L. Pottier, and Y. Robert, “Co-scheduling HPC workloads on cache-partitioned CMP platforms,” Cluster'2018: IEEE Computer Society Press, 2018.  (423.75 KB)
Bouteiller, A., G. Bosilca, T. Herault, and J. Dongarra, “Data Movement Interfaces to Support Dataflow Runtimes,” Innovative Computing Laboratory Technical Report, no. ICL-UT-18-03: University of Tennessee, May 2018.  (210.94 KB)
Le Fèvre, V., G. Bosilca, A. Bouteiller, T. Herault, A. Hori, Y. Robert, and J. Dongarra, “Do moldable applications perform better on failure-prone HPC platforms?,” Resilience: 11th Workshop on Resiliency in High Performance Computing in Clusters, Clouds, and Grids, jointly published with Euro-Par 2018: Springer Verlag, 2018.  (360.72 KB)
Jagode, H., A. Danalis, R. Hoque, M. Faverge, and J. Dongarra, “Evaluation of Dataflow Programming Models for Electronic Structure Theory,” Concurrency and Computation: Practice and Experience (CCPE): Special Issue on Parallel and Distributed Algorithms, vol. 2018, issue e4490, pp. 1--20, May 2018.  (1.69 MB)
Han, L., V. Le Fèvre, L-C. Canon, Y. Robert, and F. Vivien, “A Generic Approach to Scheduling and Checkpointing Workflows,” ICPP'2018, the 47th Int. Conf. on Parallel Processing: IEEE Computer Society Press, 2018.  (737.11 KB)
Haidar, A., A. Abdelfattah, M. Zounon, S. Tomov, and J. Dongarra, “A Guide for Achieving High Performance with Very Small Matrices on GPU: A Case Study of Batched LU and Cholesky Factorizations,” IEEE Transactions on Parallel and Distributed Systems, vol. 29, issue 5, pp. 973–984, May 2018.  (832.92 KB)
Abdelfattah, A., M. Gates, J. Kurzak, P. Luszczek, and J. Dongarra, “Implementation of the C++ API for Batch BLAS,” SLATE Working Notes, no. 7, ICL-UT-18-04: Innovative Computing Laboratory, University of Tennessee, June 2018.  (1.07 MB)
Anzt, H., T. Huckle, J. Bräckle, and J. Dongarra, “Incomplete Sparse Approximate Inverses for Parallel Preconditioning,” Parallel Computing, vol. 71, pp. 1–22, January 2018.
YarKhan, A., G. Ragghianti, J. Dongarra, M. Cawkwell, D. Perez, and A. Voter, “Initial Integration and Evaluation of SLATE Parallel BLAS in LATTE,” Innovative Computing Laboratory Technical Report, no. ICL-UT-18-07: Innovative Computing Laboratory, University of Tennessee, June 2018.  (366.6 KB)
Haidar, A., H. Jagode, P. Vaccaro, A. YarKhan, S. Tomov, and J. Dongarra, “Investigating power capping toward energy-efficient scientific applications,” Concurrency Computatation: Practice and Experience, vol. 2018, issue e4485, pp. 1--14, April 2018.  (1.2 MB)
Herault, T., Y. Robert, A. Bouteiller, D. Arnold, K. Ferreira, G. Bosilca, and J. Dongarra, “Optimal Cooperative Checkpointing for Shared High-Performance Computing Platforms,” APDCM workshop (co-located with IPDPS), Vancouver, BC, Canada, IEEE, May 2018.  (899.3 KB)
Anzt, H., M. Kreutzer, E. Ponce, G. D. Peterson, G. Wellein, and J. Dongarra, “Optimization and performance evaluation of the IDR iterative Krylov solver on GPUs,” The International Journal of High Performance Computing Applications, vol. 32, no. 2, pp. 220–230, 2018.  (2.08 MB)
Abdelfattah, A., A. Haidar, S. Tomov, and J. Dongarra, “Optimizing GPU Kernels for Irregular Batch Workloads: A Case Study for Cholesky Factorization,” IEEE High Performance Extreme Computing Conference (HPEC’18), Waltham, MA, IEEE, September 2018.
Kurzak, J., M. Gates, A. YarKhan, I. Yamazaki, P. Wu, P. Luszczek, J. Finney, and J. Dongarra, “Parallel BLAS Performance Report,” SLATE Working Notes, no. 5, ICL-UT-18-01: University of Tennessee, April 2018.  (4.39 MB)
Kurzak, J., M. Gates, A. YarKhan, I. Yamazaki, P. Luszczek, J. Finney, and J. Dongarra, “Parallel Norms Performance Report,” SLATE Working Notes, no. 6, ICL-UT-18-06: Innovative Computing Laboratory, University of Tennessee, June 2018.  (1.13 MB)
Anzt, H., E. Chow, and J. Dongarra, ParILUT - A New Parallel Threshold ILU , Tokyo, Japan, SIAM Conference on Parallel Processing for Scientific Computing, March 2018.  (19.26 MB)
Anzt, H., E. Chow, and J. Dongarra, “ParILUT–-A New Parallel Threshold ILU Factorization,” SIAM Journal on Scientific Computing, vol. 40, no. 4, pp. C503–C519, 2018.  (469.24 KB)
Benoit, A., S. Perarnau, L. Pottier, and Y. Robert, “A performance model to execute workflows on high-bandwidth memory architectures,” ICPP'2018, the 47th Int. Conf. on Parallel Processing: IEEE Computer Society Press, 2018.  (868.44 KB)
Hoemmen, M., and I. Yamazaki, Production Implementations of Pipelined & Communication-Avoiding Iterative Linear Solvers , Tokyo, Japan, SIAM Conference on Parallel Processing for Scientific Computing, March 2018.  (2.34 MB)
Anzt, H., I. Yamazaki, M. Hoemmen, E. Boman, and J. Dongarra, “Solver Interface & Performance on Cori,” Innovative Computing Laboratory Technical Report, no. ICL-UT-18-05: University of Tennessee, June 2018.  (188.05 KB)
Yamazaki, I., J. Kurzak, P. Wu, M. Zounon, and J. Dongarra, “Symmetric Indefinite Linear Solver using OpenMP Task on Multicore Architectures,” IEEE Transactions on Parallel and Distributed Systems, 2018.  (2.88 MB)
Chow, E., H. Anzt, J. Scott, and J. Dongarra, “Using Jacobi iterations and blocking for solving sparse triangular systems in incomplete factorization preconditioning,” Journal of Parallel and Distributed Computing, vol. 119, pp. 219–230, 2018.  (273.53 KB)
Anzt, H., J. Dongarra, G. Flegar, and E. S. Quintana-Ortí, “Variable-size batched Gauss–Jordan elimination for block-Jacobi preconditioning on graphics processors,” Parallel Computing, 2018.  (1.9 MB)
2017
Jagode, H., A. Danalis, and J. Dongarra, “Accelerating NWChem Coupled Cluster through Dataflow-Based Execution,” The International Journal of High Performance Computing Applications, pp. 1–13, January 2017.  (4.07 MB)
Gates, M., S. Tomov, and J. Dongarra, “Accelerating the SVD Two Stage Bidiagonal Reduction and Divide and Conquer Using GPUs,” Parallel Computing, November 2017.
Seo, S., A. Amer, P. Balaji, C. Bordage, G. Bosilca, A. Brooks, P. Carns, A. Castello, D. Genet, T. Herault, et al., “Argobots: A Lightweight Low-Level Threading and Tasking Framework,” IEEE Transactions on Parallel and Distributed Systems, October 2017.
Aupy, G., Y. Robert, and F. Vivien, “Assuming failure independence: are we right to be wrong?,” The 3rd International Workshop on Fault Tolerant Systems (FTS), Honolulu, Hawaii, IEEE, September 2017.  (597.11 KB)
Gates, M., J. Kurzak, P. Luszczek, Y. Pei, and J. Dongarra, “Autotuning Batch Cholesky Factorization in CUDA with Interleaved Layout of Matrices,” Parallel and Distributed Processing Symposium Workshops (IPDPSW), Orlando, FL, IEEE, June 2017.
Anzt, H., J. Dongarra, G. Flegar, and E. S. Quintana-Ortí, “Batched Gauss-Jordan Elimination for Block-Jacobi Preconditioner Generation on GPUs,” Proceedings of the 8th International Workshop on Programming Models and Applications for Multicores and Manycores, New York, NY, USA, ACM, pp. 1–10, February 2017.  (552.62 KB)
“BDEC Pathways to Convergence: Toward a Shaping Strategy for a Future Software and Data Ecosystem for Scientific Inquiry,” Innovative Computing Laboratory Technical Report, no. ICL-UT-17-08: University of Tennessee, November 2017.
Faverge, M., J. Langou, Y. Robert, and J. Dongarra, “Bidiagonalization and R-Bidiagonalization: Parallel Tiled Algorithms, Critical Paths and Distributed-Memory Implementation,” IEEE International Parallel and Distributed Processing Symposium (IPDPS), Orlando, FL, IEEE, May 2017.  (328.15 KB)
Anzt, H., J. Dongarra, M. Gates, J. Kurzak, P. Luszczek, S. Tomov, and I. Yamazaki, “Bringing High Performance Computing to Big Data Algorithms,” Handbook of Big Data Technologies: Springer, 2017.
Abdelfattah, A., K. Arturov, C. Cecka, J. Dongarra, C. Freitag, M. Gates, A. Haidar, J. Kurzak, P. Luszczek, S. Tomov, et al., “C++ API for Batch BLAS,” SLATE Working Notes, no. 4, ICL-UT-17-12: University of Tennessee, December 2017.  (1.89 MB)
Gates, M., P. Luszczek, A. Abdelfattah, J. Kurzak, J. Dongarra, K. Arturov, C. Cecka, and C. Freitag, “C++ API for BLAS and LAPACK,” SLATE Working Notes, no. 2, ICL-UT-17-03: Innovative Computing Laboratory, University of Tennessee, June 2017.  (1.12 MB)
Fayad, D., J. Kurzak, P. Luszczek, P. Wu, and J. Dongarra, “The Case for Directive Programming for Accelerator Autotuner Optimization,” Innovative Computing Laboratory Technical Report, no. ICL-UT-17-07: University of Tennessee, October 2017.  (341.52 KB)
Han, L., L-C. Canon, H. Casanova, Y. Robert, and F. Vivien, “Checkpointing Workflows for Fail-Stop Errors,” IEEE Cluster, Honolulu, Hawaii, IEEE, September 2017.  (400.64 KB)
Yamazaki, I., M. Hoemmen, P. Luszczek, and J. Dongarra, Comparing performance of s-step and pipelined GMRES on distributed-memory multicore CPUs , Pittsburgh, Pennsylvania, SIAM Annual Meeting, July 2017.  (748 KB)

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