Publications

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Malony, A. D., S. Biersdorff, S. Shende, H. Jagode, S. Tomov, G. Juckeland, R. Dietrich, D. Poole, and C. Lamb, “Parallel Performance Measurement of Heterogeneous Parallel Systems with GPUs,” International Conference on Parallel Processing (ICPP'11), Taipei, Taiwan, ACM, September 2011.  (1.41 MB)
Kurzak, J., M. Gates, A. YarKhan, I. Yamazaki, P. Luszczek, J. Finney, and J. Dongarra, “Parallel Norms Performance Report,” SLATE Working Notes, no. 06, ICL-UT-18-06: Innovative Computing Laboratory, University of Tennessee, June 2018.  (1.13 MB)
Fagg, G., E. Gabriel, and M. Resch, “Parallel IO Support for Meta-Computing Applications: MPI_Connect IO Applied to PACX-MPI,” 8th European PVM/MPI User's Group Meeting, Lecture Notes in Computer Science, vol. 2131, Greece, Springer Verlag, Berlin, September 2001.  (129.3 KB)
Cronk, D., G. Fagg, and S. Moore, “Parallel I/O for EQM Applications,” Department of Defense Users' Group Conference Proceedings (to appear),, Biloxi, Mississippi, June 2001.  (81.41 KB)
Henry, G., D. Watkins, and J. Dongarra, “A Parallel Implementation of the Nonsymmetric QR Algorithm for Distributed Memory Architectures,” SIAM Journal on Scientific Computing, vol. 24, no. 1, pp. 284-311, January 2003.  (224.7 KB)
Henry, G., D. Watkins, and J. Dongarra, “A Parallel Implementation of the Nonsymmetric QR Algorithm for Disitributed Memory Architectures,” SIAM Journal on Scientific Computing, vol. 16, no. 2, pp. 284-311, October 2002.  (224.7 KB)
Buttari, A., J. Dongarra, J. Kurzak, and J. Langou, “Parallel Dense Linear Algebra Software in the Multicore Era,” in Cyberinfrastructure Technologies and Applications: Nova Science Publishers, Inc., pp. 9-24, 00 2009.
Ltaeif, H., J. Kurzak, and J. Dongarra, “Parallel Block Hessenberg Reduction using Algorithms-By-Tiles for Multicore Architectures Revisited,” University of Tennessee Computer Science Technical Report, UT-CS-08-624 (also LAPACK Working Note 208), August 2008.  (420.31 KB)
Kurzak, J., M. Gates, A. YarKhan, I. Yamazaki, P. Wu, P. Luszczek, J. Finney, and J. Dongarra, “Parallel BLAS Performance Report,” SLATE Working Notes, no. 05, ICL-UT-18-01: University of Tennessee, April 2018.  (4.39 MB)
Ltaeif, H., J. Kurzak, and J. Dongarra, “Parallel Band Two-Sided Matrix Bidiagonalization for Multicore Architectures,” IEEE Transactions on Parallel and Distributed Systems (to appear), May 2009.  (208.16 KB)
Ltaeif, H., J. Kurzak, and J. Dongarra, “Parallel Band Two-Sided Matrix Bidiagonalization for Multicore Architectures,” IEEE Transactions on Parallel and Distributed Systems, pp. 417-423, April 2010.  (208.16 KB)
Petitet, A., H. Casanova, J. Dongarra, Y. Robert, and C. Whaley, “Parallel and Distributed Scientific Computing: A Numerical Linear Algebra Problem Solving Environment Designer's Perspective,” Handbook on Parallel and Distributed Processing, January 1999.  (323.01 KB)
Agullo, E., L. Giraud, A. Guermouche, A. Haidar, and J. Roman, “Parallel algebraic domain decomposition solver for the solution of augmented systems.,” Parallel, Distributed, Grid and Cloud Computing for Engineering, Ajaccio, Corsica, France, 12-15 April, 00 2011.
Sid-Lakhdar, W. M., S. Cayrols, D. Bielich, A. Abdelfattah, P. Luszczek, M. Gates, S. Tomov, H. Johansen, D. Williams-Young, T. A. Davis, et al., “PAQR: Pivoting Avoiding QR factorization,” ICL Technical Report, no. ICL-UT-22-06, June 2022.  (364.85 KB)
Sid-Lakhdar, W., S. Cayrols, D. Bielich, A. Abdelfattah, P. Luszczek, M. Gates, S. Tomov, H. Johansen, D. Williams-Young, T. Davis, et al., “PAQR: Pivoting Avoiding QR factorization,” 2023 IEEE International Parallel and Distributed Processing Symposium (IPDPS), St. Petersburg, FL, USA, IEEE, 2023.
Johnson, M., H. McCraw, S. Moore, P. Mucci, J. Nelson, D. Terpstra, V. M. Weaver, and T. Mohan, “PAPI-V: Performance Monitoring for Virtual Machines,” CloudTech-HPC 2012, Pittsburgh, PA, September 2012.  (2.69 MB)
Danalis, A., H. Jagode, and J. Dongarra, PAPI's new Software-Defined Events for in-depth Performance Analysis , Dresden, Germany, 13th Parallel Tools Workshop, September 2019.  (3.14 MB)
Jagode, H., A. Danalis, and J. Dongarra, PAPI's New Software-Defined Events for In-Depth Performance Analysis , Lyon, France, CCDSC 2018: Workshop on Clusters, Clouds, and Data for Scientific Computing, September 2018.
Jagode, H., A. Danalis, H. Anzt, and J. Dongarra, “PAPI Software-Defined Events for in-Depth Performance Analysis,” The International Journal of High Performance Computing Applications, vol. 33, issue 6, pp. 1113-1127, November 2019.  (442.39 KB)
London, K., S. Moore, P. Mucci, K. Seymour, and R. Luczak, “The PAPI Cross-Platform Interface to Hardware Performance Counters,” Department of Defense Users' Group Conference Proceedings, Biloxi, Mississippi, June 2001.  (328.56 KB)
Danalis, A., H. Jagode, and J. Dongarra, PAPI: Counting outside the Box , Barcelona, Spain, 8th JLESC Meeting, April 2018.
Browne, S., C. Deane, G. Ho, and P. Mucci, “PAPI: A Portable Interface to Hardware Performance Counters,” Proceedings of Department of Defense HPCMP Users Group Conference, June 1999.  (57.77 KB)
Weaver, V., D. Terpstra, H. McCraw, M. Johnson, K. Kasichayanula, J. Ralph, J. Nelson, P. Mucci, T. Mohan, and S. Moore, PAPI 5: Measuring Power, Energy, and the Cloud , Austin, TX, 2013 IEEE International Symposium on Performance Analysis of Systems and Software, April 2013.  (78.39 KB)
Hoemmen, M., D. Hollman, C. Trott, D. Sunderland, N. Liber, L-T. Lo, D. Lebrun-Grandie, G. Lopez, P. Caday, S. Knepper, et al., “P1673R3: A Free Function Linear algebra Interface Based on the BLAS,” ISO JTC1 SC22 WG22, no. P1673R3: ISO, April 2021.  (858.89 KB)
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Steen, A J.. van der, and J. Dongarra, “Overview of High Performance Computers,” Handbook of Massive Data Sets: Kluwer Academic Publishers, pp. 791-852, January 2001.  (442.71 KB)
Dongarra, J., and A. Lastovetsky, “An Overview of Heterogeneous High Performance and Grid Computing,” Engineering the Grid (to appear): Nova Science Publishers, Inc., 00 2004.  (199.93 KB)
Seymour, K., H. Nakada, S. Matsuoka, J. Dongarra, C. Lee, and H. Casanova, “Overview of GridRPC: A Remote Procedure Call API for Grid Computing,” Proceedings of the Third International Workshop on Grid Computing, pp. 274-278, January 2002.  (221.82 KB)
White, J. B., and J. Dongarra, “Overlapping Computation and Communication for Advection on a Hybrid Parallel Computer,” IEEE International Parallel and Distributed Processing Symposium (submitted), Anchorage, AK, May 2011.
Hori, A., K. Yoshinaga, T. Herault, A. Bouteiller, G. Bosilca, and Y. Ishikawa, “Overhead of Using Spare Nodes,” The International Journal of High Performance Computing Applications, February 2020.  (2.15 MB)
Haidar, A., K. Kabir, D. Fayad, S. Tomov, and J. Dongarra, “Out of Memory SVD Solver for Big Data,” 2017 IEEE High Performance Extreme Computing Conference (HPEC'17), Waltham, MA, IEEE, September 2017.  (1.33 MB)
Dong, T., A. Haidar, S. Tomov, and J. Dongarra, “Optimizing the SVD Bidiagonalization Process for a Batch of Small Matrices,” International Conference on Computational Science (ICCS 2017), Zurich, Switzerland, Procedia Computer Science, June 2017.  (364.95 KB)
Nath, R., S. Tomov, T. Dong, and J. Dongarra, “Optimizing Symmetric Dense Matrix-Vector Multiplication on GPUs,” ACM/IEEE Conference on Supercomputing (SC’11), Seattle, WA, November 2011.  (630.63 KB)
Plank, J., M. Beck, J. Dongarra, R. Wolski, and H. Casanova, “Optimizing Performance and Reliability in Distributed Computing Systems Through Wide Spectrum Storage,” Proceedings of the IPDPS 2003, NGS Workshop, Nice, France, pp. 209, January 2003.
Abdelfattah, A., J. Dongarra, D. Keyes, and H. Ltaeif, “Optimizing Memory-Bound Numerical Kernels on GPU Hardware Accelerators,” VECPAR 2012, Kobe, Japan, July 2012.  (737.28 KB)
Alvaro, W., J. Kurzak, and J. Dongarra, “Optimizing Matrix Multiplication for a Short-Vector SIMD Architecture - CELL Processor,” Parallel Computing, vol. 35, pp. 138-150, 00 2009.  (591.16 KB)
Tomov, S., P. Luszczek, I. Yamazaki, J. Dongarra, H. Anzt, and W. Sawyer, “Optimizing Krylov Subspace Solvers on Graphics Processing Units,” Fourth International Workshop on Accelerators and Hybrid Exascale Systems (AsHES), IPDPS 2014, Phoenix, AZ, IEEE, May 2014.  (536.32 KB)
Abdelfattah, A., A. Haidar, S. Tomov, and J. Dongarra, “Optimizing GPU Kernels for Irregular Batch Workloads: A Case Study for Cholesky Factorization,” IEEE High Performance Extreme Computing Conference (HPEC’18), Waltham, MA, IEEE, September 2018.  (729.87 KB)
Abdelfattah, A., S. Tomov, and J. Dongarra, Optimizing Batch HGEMM on Small Sizes Using Tensor Cores , San Jose, CA, GPU Technology Conference (GTC), March 2019.  (2.47 MB)
Dongarra, J., S. Hammarling, N. J. Higham, S. Relton, and M. Zounon, “Optimized Batched Linear Algebra for Modern Architectures,” Euro-Par 2017, Santiago de Compostela, Spain, Springer, August 2017.  (618.33 KB)
Hiroyasu, T., M. Miki, H. Shimosaka, Y. Tanimura, and J. Dongarra, “Optimization System Using Grid RPC,” Meeting of the Japan Society of Mechanical Engineers, Kyoto University, Kyoto, Japan, October 2002.
Shimosaka, H., T. Hiroyasu, M. Miki, and J. Dongarra, “Optimization Problem Solving System Using GridRPC,” IEEE Transactions on Parallel and Distributed Systems (submitted), January 2005.  (740.57 KB)
Hiroyasu, T., M. Miki, H. Shimosaka, and J. Dongarra, “Optimization Problem Solving System using Grid RPC,” 3rd IEEE/ACM International Symposium on Cluster Computing and the Grid, Tokyo, Japan, March 2003.  (71.6 KB)
Hiroyasu, T., M. Miki, J. Sawada, and J. Dongarra, “Optimization of Injection Schedule of Diesel Engine Using GridRPC,” Information Processing Society of Japan Symposium Series, vol. 2003, no. 14, pp. 189-197, January 2003.  (520.96 KB)
Haidar, A., T. Dong, P. Luszczek, S. Tomov, and J. Dongarra, “Optimization for Performance and Energy for Batched Matrix Computations on GPUs,” 8th Workshop on General Purpose Processing Using GPUs (GPGPU 8), San Francisco, CA, ACM, February 2015.  (699.5 KB)
Anzt, H., M. Kreutzer, E. Ponce, G. D. Peterson, G. Wellein, and J. Dongarra, “Optimization and Performance Evaluation of the IDR Iterative Krylov Solver on GPUs,” The International Journal of High Performance Computing Applications, vol. 32, no. 2, pp. 220–230, March 2018.  (2.08 MB)
Angskun, T., G. Bosilca, B. Vander Zanden, and J. Dongarra, “Optimal Routing in Binomial Graph Networks,” The International Conference on Parallel and Distributed Computing, applications and Technologies (PDCAT), Adelaide, Australia, IEEE Computer Society, December 2007.
Benoit, A., A. Cavelan, Y. Robert, and H. Sun, “Optimal Resilience Patterns to Cope with Fail-stop and Silent Errors,” 2016 IEEE International Parallel and Distributed Processing Symposium (IPDPS), Chicago, IL, IEEE, May 2016.  (603.58 KB)
Herault, T., Y. Robert, A. Bouteiller, D. Arnold, K. Ferreira, G. Bosilca, and J. Dongarra, “Optimal Cooperative Checkpointing for Shared High-Performance Computing Platforms,” 2018 IEEE International Parallel and Distributed Processing Symposium Workshops (IPDPSW), Best Paper Award, Vancouver, BC, Canada, IEEE, May 2018.  (899.3 KB)
Du, Y., G. Pallez, L. Marchal, and Y. Robert, “Optimal Checkpointing Strategies for Iterative Applications,” IEEE Transactions on Parallel Distributed Systems, vol. 33, issue 3, pp. 507-522, March 2022.  (1.47 MB)
Benoit, A., A. Cavelan, V. Le Fèvre, and Y. Robert, “Optimal Checkpointing Period with replicated execution on heterogeneous platforms,” 2017 Workshop on Fault-Tolerance for HPC at Extreme Scale, Washington, DC, IEEE Computer Society Press, June 2017.  (1.02 MB)

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