Power Monitoring with PAPI for Extreme Scale Architectures and Dataflow-based Programming Models

TitlePower Monitoring with PAPI for Extreme Scale Architectures and Dataflow-based Programming Models
Publication TypeConference Paper
Year of Publication2014
AuthorsMcCraw, H., J. Ralph, A. Danalis, and J. Dongarra
Conference Name2014 IEEE International Conference on Cluster Computing
Date Published09-2014
PublisherIEEE
Conference LocationMadrid, Spain
Abstract

For more than a decade, the PAPI performance-monitoring library has provided a clear, portable interface to the hardware performance counters available on all modern CPUs and other components of interest (e.g., GPUs, network, and I/O systems). Most major end-user tools that application developers use to analyze the performance of their applications rely on PAPI to gain access to these performance counters.

One of the critical road-blockers on the way to larger, more complex high performance systems, has been widely identified as being the energy efficiency constraints. With modern extreme scale machines having hundreds of thousands of cores, the ability to reduce power consumption for each CPU at the software level becomes critically important, both for economic and environmental reasons. In order for PAPI to continue playing its well established role in HPC, it is pressing to provide valuable performance data that not only originates from within the processing cores but also delivers insight into the power consumption of the system as a whole.

An extensive effort has been made to extend the Performance API to support power monitoring capabilities for various platforms. This paper provides detailed information about three components that allow power monitoring on the Intel Xeon Phi and Blue Gene/Q. Furthermore, we discuss the integration of PAPI in PARSEC – a taskbased dataflow-driven execution engine – enabling hardware performance counter and power monitoring at true task granularity.

Project Tags: 
External Publication Flag: